DC stabilization power supply circuits which permit a constant DC voltage to be always applied to a load irrespectively of variations in current consumption of a load or an input voltage of the load have been used in a variety of fields such as a power supply circuit for computers, etc.
As shown in FIG. 6, in a conventional DC stabilized power supply circuit 101, an output transistor 102 supplies a current in accordance with a drive current Id to a load 105. The output voltage V.sub.out between the output terminals is divided by a voltage dividing circuit 103, and a feedback voltage V.sub.adj is applied to an error amplifier 111.
For example, when an output voltage V.sub.out is to be lowered due to an increase in current consumption (load current) of the load 105, the error amplifier 111 compares the feedback voltage V.sub.adj with a constant reference voltage V.sub.ref to detect a difference. In this case, the error amplifier 111 increases an output voltage VA and instructs a base driving circuit 112 to increase a drive current Id. As a result, a corrector current of the output transistor 102, i.e., an output current I.sub.out of the DC stabilized power supply circuit 101 increases to maintain the output voltage V.sub.out constant. On the other hand, for example, when an output voltage V.sub.out is to increase due to an increase in input voltage V.sub.IN, the error amplifier 111 lowers an output voltage VA to instruct the base driving circuit 112 to decrease the drive current Id. As a result, an output current I.sub.OUT of the DC stabilized power supply circuit 101 decreases to maintain the output voltage V.sub.out constant. As a result, the DC stabilized power supply circuit 101 can apply a constant voltage to the load 105 irrespectively of a change in input voltage V.sub.IN or a current consumption of the load 105.
The CD stabilized power supply circuit 101 having the described arrangement supplies a current in accordance with the load current to maintain the output voltage V.sub.out constant. Therefore, when the load current becomes too large, a damage on the DC stabilized power supply circuit 101 may occur. Therefore, in order to protect the DC stabilized power supply circuit 101 against a supply of an overcurrent, it is required to provide therein a circuit for limiting a maximum value of an output current. Even if the overcurrent protecting function is provided, in an event of a short circuit between the output terminals, the DC stabilized power supply circuit 101 supplies a current as much as possible in order to increase the output voltage V.sub.out. This causes a problem of overheat between the output terminals which may cause a damage of the DC stabilized power supply circuit 101 as well as peripheral equipments. Therefore, a short-circuit prevention function is inevitable for the DC stabilized power supply circuit 101 to which a high output current is applied.
In the DC stabilized power supply circuit 101, a short-circuit overcurrent protecting section 113 is provided to achieve both of the described functions. For a low-loss DC stabilized power supply circuit 101, in the case of adopting the output transistor 102 and the control-use IC of two chips, the short-circuit overcurrent protecting section 113 detects an overcurrent and a short-circuit not based on the output current V.sub.out but based on the drive current Id.
Here, respective structures of the circuits 111 and 113 will be explained in detail. The base driving circuit 112 includes an NPN-type transistor Qill and a NPN-type transistor Q112 which are Darlington connected. The transistor Q111 is arranged such that the base is connected to the output of the error amplifier 111, and the collector is connected to the collector of the output transistor 102. Therefore, the transistor Q112 absorbs a drive current Id in an amount corresponding to an output voltage VA of the error amplifier 111.
The short-circuit overcurrent protecting section 113 includes an NPN-type transistor Q121 and a resistor R121 for detecting a short-circuit and an overcurrent. The base and the collector of the transistor Q121 are mutually connected and are connected to the emitter of the transistor Q112. The emitter of the transistor Q121 is connected to ground via the resistor R121. Between the base and the emitter of the transistor Q121, the resistor R122 is provided for biasing the transistor Q121.
In the DC stabilized power supply circuit 101 having the described arrangement, without an applied load, the output transistor 102 supplies a current only to the voltage dividing circuit 103. In this state, the drive current Id of the output transistor 102 is extremely small (around several tens .mu.A). Therefore, in the short-circuit overcurrent protecting circuit 113, the transistor Q121 is not biased, and the drive current Id flows in the GND via the resistor R122. As a result, in the error amplifier 111, the output voltage VA1 without an applied load is given as around 1.0 V from the following formula (1): ##EQU1##
In the above formula (1), VBE (Q111) and VBE (Q112) are a voltage between the base and emitter of the transistor Q111 and a voltage between the base and the emitter of the transistor Q112 respectively, and the VBE is a voltage between the base and the emitter when both of the above voltages are the same.
On the other hand, when the current consumption of the load 105 (load current I.sub.OUT) rises, the base driving circuit 112 increases the drive current Id. As a result, the output transistor 102 supplies the load current I.sub.OUT to the load 105. In this state, the transistor Q121 is biased, and the drive current Id flows via the transistor Q112. As a result, the output voltage VA2 of the error amplifier 111 is given as around 2.6 V from the following formula: ##EQU2##
Here, the VR121 is a terminal based voltage of the resistor R121.
When the load current V.sub.out becomes large, the drive current Id increases, and this, in turn, increases the terminal based voltage VR121 of the resistor R121. The short-circuit overcurrent protecting circuit 121 of the short-circuit protecting section 113 observes the terminal based voltage VR121 to detect an overcurrent. When the voltage VR121 exceeds a predetermined value, the short-circuit overcurrent protecting circuit 121 lowers the output voltage VA of the error amplifier 111. As a result, the drive current Id is limited, and the DC stabilized power supply circuit 101 can be protected against an overcurrent.
On the other hand, when short-circuiting the output terminal, the feedback voltage V.sub.adj is lowered, and the error amplifier 111 applies a high output voltage VA to the base of the transistor Q111. As a result, the emitter current of the transistor Q111 flows via the resistors R102, R122 and R121, and the terminal based voltage of the resistor R121 becomes higher than that in the conducting state of the transistor Q121. The short-circuit overcurrent protecting circuit 121 observes the terminal based voltage of the resistor R121 for detecting the short-circuit, and when the terminal based voltage exceeds the predetermined value, the short-circuit overcurrent protecting circuit 121 lowers the output voltage VA of the error amplifier 111. As a result, the drive current Id is limited, and the DC stabilized power supply circuit 101 can be protected against the short-circuit.
However, the DC stabilized power supply circuit 101 having the described arrangement has a drawback in that transient response of the output current is low. A delay in the transient response results from charging a phase compensation capacity C101 provided in the error amplifier 111 at a rise from no load to a heavy load.
Specifically, at a rise from no load to heavy load, one end of the phase compensation capacity C 101, i.e., the output voltage VA of a differential amplifier 111 greatly varies as shown by the formulae (1) and (2) by around 1.6 V from around 1.0 V to around 2.6 V. The other end of the phase compensation capacity C101 is substantially constant and is connected to the internal circuit of a differential amplifier A101. Therefore, at a rise from no load to a heavy load, it takes time to charge the phase compensation capacity C101. As a result, a delay in rise occurs before the base driving circuit 112 adjusts the drive current Id, and the voltage between the corrector and emitter of the output transistor 102 increases. As a result, for example, in the case where the output voltage V.sub.out is set to 3.3 V, the output voltage V.sub.out is lowered by around 0.5 V in a period of around 30 .mu.s.
As the load 105 of the DC stabilized power supply circuit 101, for example, a CPU (Central Processing Unit) may be adopted. However, for example, in the CPU for use in recent personal computers, in order to achieve a high speed operation, a clock frequency is increased. Additionally, with an increase in the clock frequency, the current consumption also increases. For example, in some updated CPUs, a maximum current consumption reaches around 10 A. In general, in the digital circuit such as CPU, etc., a current consumption rapidly varies in response to an operating state; however, with an increase in maximum current consumption or an increase in clock frequency, larger variations in current consumption occur more abruptly.
In order to meet the described load 105, in the recent DC stabilized power supply circuit 101, regulation transient response characteristics become the key factor. However, in such conventional DC stabilized power supply circuit 101, as a transient response is low, it is difficult to meet the described requirements.
For example, Japanese Unexamined Patent Publication No. 12974/1993 (Tokukaihei 5-121974) discloses a method of increasing a current to be supplied to a load of an operational amplifier according to a power consumption of the operational amplifier applied to a voltage follower circuit. Specifically, a resistor is provided between a power supply terminal and a power supply of the operational amplifier which constitutes a voltage follower circuit. Additionally, to an output of the operational amplifier, transistors for supplying currents in amounts according to the terminal based voltage of the resistor are provided in parallel. According to the described arrangement, due to variations in load voltage of the operational amplifier and variations in power consumption of the operational amplifier, the transistor increases a current to be supplied to the load. As a result, the voltage follower circuit permits a high speed response with respect to variations in load voltage.
However, the described arrangement is designed for the voltage follower circuit in which an output follows an input, and thus cannot be used for the purpose of amplifying an input unlike the error amplifier 111 as shown in FIG. 6. Additionally, even if the drive capacity of the error amplifier 111 is improved, the biased state of the transistor Q121 varies when rising from no load to a heavy load. Therefore, variations in output voltage VA increase, and such problem that a transient response is delayed has not yet been solved.
In order to solve the described problem, various methods have been proposed, for example, as follows: A method (a) wherein a resistance R101 between the base and the emitter of the output transistor 102 is lowered. According to the method (a), to the transistor Q121 of the short-circuit overcurrent protecting section 113, an invalid current is supplied via the resistor 101 from the input voltage V.sub.in, the transistor Q 121 is biased, and the output voltage VA of the error amplifier 111 increases by a voltage between the base and the emitter of the transistor Q121. As a result, variations in output voltage VA between no load and a heavy load can be suppressed.
However, according to the described method, although transient response characteristics improve, a new problem arises in that a current consumption of the DC stabilized power supply circuit 101 without an applied load increases. As a result, especially in the arrangement where an input voltage V.sub.in is applied using batteries like the portable equipments, etc., the batteries are quickly consumed, which results in a shorter operation time of the equipments.
Another method (b) has been proposed wherein a capacity of the phase compensation capacity C101 is reduced. As a result, in the phase compensation capacity C101, even if variations in the terminal based voltage occur, the charging time can be maintained short, thereby achieving improved transient response characteristics of the DC stabilized power supply circuit 101. However, when adopting the method (b), in the error amplifier 111, as a phase margin is reduced, for example, due to variations in ambient temperature, input, etc., the error amplifier 111 may oscillate.
A still another method (c) has been proposed, for example, by Japanese Unexamined Patent Publication No. 122725/1986 (Tokukaisho 61-122725) in which a main adjustment and a fine adjustment are carried out. Specifically, a DC stabilized power supply circuit includes a floating power supply circuit having a first terminal and a second terminal, a first feedback circuit for controlling a potential of the second terminal based on a potential of the first terminal, i.e., an output terminal of the DC stabilized power supply circuit, and a second feedback circuit for controlling the terminal based voltage of the floating power supply circuit. According to the described arrangement, the floating power supply circuit mainly adjusts an output voltage of the DC stabilized power supply circuit by controlling the terminal based voltage. As a result, even when the output voltage varies in a wide range due to variations in load, a change in output voltage can be compensated. On the other hand, as the first feedback circuit controls a potential of the second terminal to apply a fine adjustment to an output voltage of the DC stabilized power supply circuit. As a result, even when a fine transient variation in output voltage occurs, changes in output voltage can be compensated. However, in the described arrangement, separate circuits are required for the main adjustment and fine adjustment, and thus the structure of the DC current stabilized power supply circuit becomes complicated.
As described, in any of the described conventional methods (a) thorough (c), although improved transient response characteristics can be achieved, as the described new problems arise, a complete solution to the above-mentioned problems cannot be achieved.